Line termination in high speed signaling applications is an important electrical performance requirement for high quality signal transfer. Directly related, signal quality and return loss are important performance parameters which are a function of the line termination. On-chip resistors are used as line terminations for the signal transfer. The accuracy of on-chip resistors is therefore important. Many applications require accurate line termination resistors within a range of −10% to 10%. Such applications include, for example, DVI, HDMI, DisplayPort, PCI Express, and Serial ATA. However, modern semiconductor manufacturing processes usually have a much larger on-chip resistor variations, with a variation range of +/−20% to +/−35% being typical. As such, a calibration scheme is needed to provide accurate on-chip resistors. One result of low accuracy on-chip resistors is, for example, low product yield.
In the prior art, a conventional way to calibrate an on-chip resistor is to adjust a voltage controlled resistor which in CMOS is a PMOS or NMOS transistor. The control voltage is filtered by a low pass filter. In the prior art, an analog control voltage is used to continuously adjust the resistor value. This technique is discussed in “On-die Termination Resistors With Analog Impedance Control for Standard CMOS Technology,” Yongpin Fan, Jeffery E. Smith, IEEE J. Solid-State Circuits, vol. 38, No. 2, February, 2003, and “A Mixed-Mode Voltage Down Converter with Impedance Adjustment Circuitry for Low-Voltage High-Frequency Memories,” Tsukasa Oishi, et al., IEEE J. Solid-State Circuits, vol. 31, No. 4, April 1996.
However, these and other prior art expander systems have certain performance shortcomings. For example, analog memory in the form of a loop capacitor cannot be maintained at a fixed value without loop feedback because the capacitor leaks its stored charge. The capacitor charge must be updated by the control loop by detecting the resistor differences. The prior art systems require a relatively large die size, resulting in higher costs. Furthermore, delivering a control voltage to line termination line resistors is difficult and may introduce errors without very good buffering. Thus there is a need for improved on-chip resistor calibration systems and methods.